Principal Engineer -Software Design

About the Role

About the Position * Design and build complete FPGA\-based SoC applications using our C\+\+ flow — writing HLS cores, integrating them into full systems (interconnect, IPs, firmware), and running them on real hardware. * Use these apps to drive regression/validation testing (functional correctness, performance, QoR, timing). * Act as an internal "customer zero," feeding hands\-on findings into feature prioritization and roadmap decisions alongside the compiler teams. Responsibilities * Firmware/embedded C\+\+ development (drivers, RTOS/bare\-metal, DMA/interrupts); high\-level synthesis as a user (Vitis HLS, Catapult, SmartHLS, or similar — pragmas, pipelining, QoR analysis); * FPGA/SoC system design (AXI, memory hierarchies, IP integration); strong general software engineering (C\+\+); and a test/quality mindset for complex toolchains. * communicate well, thrive with ambiguity, and are excited about the future of C\+\+\-based hardware/software co\-design. * Xilinx/ AMD Vitis flow experience, SDK and boot gen flows * Expertise to build Embedded FPGA application and validate on Silicon * Testing Linux and Standalone Device Drivers * Overall 8\+ years of experience in same domain. Why Join Us! * We are looking for like\-minded people who can share our passion for success. * Opportunity to work on next\-generation FPGA products. * Collaborate with a dynamic, highly skilled technical publications team. * Take ownership of documentation for complex software and hardware workflows. * Work in a fast\-paced, agile environment solving challenging and interesting technical problems. **Requirements/Qualifications:** B.Tech/Masters \- with Equivalent experience. **Travel Time:** 0% \- 25% Pay: ₹2,500,000\.00 \- ₹3,500,000\.00 per year Work Location: In person